Analysis of a Network Interface for an On-Chip Network Architecture

Byron Ojeda; Mayerly Saenz; Verónica Alulema; Darwin Alulema

doi:10.1007/978-3-031-24327-1_7

Analysis of a Network Interface for an On-Chip Network Architecture

Byron Ojeda, Mayerly Saenz, Verónica Alulema, Darwin Alulema

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This document details a study on the Network Interface (Network on Chip), focused on performance parameters, by injecting traffic of diverse types, CBR traffic and multimedia traffic, which are the most used today. For this, a NIRGAM Network simulator is used as a tool, which has the necessary configuration parameters to obtain the performance, latency, and power values to analyse the proposal. The results show that performance is a parameter that can be optimized by increasing the flit and/or operating frequency value, but without neglecting the power consumption that it would generate.

Original language	English
Title of host publication	Intelligent Technologies
Subtitle of host publication	Design and Applications for Society - Proceedings of CITIS 2022
Editors	Vladimir Robles-Bykbaev, Josefa Mula, Gilberto Reynoso-Meza
Publisher	Springer Science and Business Media Deutschland GmbH
Pages	72-80
Number of pages	9
ISBN (Print)	9783031243264
DOIs	https://doi.org/10.1007/978-3-031-24327-1_7
State	Published - 2023
Externally published	Yes
Event	8th International Conference on Science, Technology and Innovation for Society, CITIS 2022 - Guayaquil, Ecuador Duration: 22 Jun 2022 → 24 Jun 2022

Publication series

Name	Lecture Notes in Networks and Systems
Volume	607 LNNS
ISSN (Print)	2367-3370
ISSN (Electronic)	2367-3389

Conference

Conference	8th International Conference on Science, Technology and Innovation for Society, CITIS 2022
Country/Territory	Ecuador
City	Guayaquil
Period	22/06/22 → 24/06/22

Bibliographical note

Publisher Copyright:
© 2023, The Author(s), under exclusive license to Springer Nature Switzerland AG.

Keywords

Field Programmable Gate Arrays (FPGA)
Network on Chip (NOC)
System on Chip (SoC)

Access to Document

10.1007/978-3-031-24327-1_7

Cite this

Ojeda, B., Saenz, M., Alulema, V., & Alulema, D. (2023). Analysis of a Network Interface for an On-Chip Network Architecture. In V. Robles-Bykbaev, J. Mula, & G. Reynoso-Meza (Eds.), Intelligent Technologies: Design and Applications for Society - Proceedings of CITIS 2022 (pp. 72-80). (Lecture Notes in Networks and Systems; Vol. 607 LNNS). Springer Science and Business Media Deutschland GmbH. https://doi.org/10.1007/978-3-031-24327-1_7

Ojeda, Byron ; Saenz, Mayerly ; Alulema, Verónica et al. / Analysis of a Network Interface for an On-Chip Network Architecture. Intelligent Technologies: Design and Applications for Society - Proceedings of CITIS 2022. editor / Vladimir Robles-Bykbaev ; Josefa Mula ; Gilberto Reynoso-Meza. Springer Science and Business Media Deutschland GmbH, 2023. pp. 72-80 (Lecture Notes in Networks and Systems).

@inproceedings{142f266c8b3d4659b5258f9669aee1fd,

title = "Analysis of a Network Interface for an On-Chip Network Architecture",

abstract = "This document details a study on the Network Interface (Network on Chip), focused on performance parameters, by injecting traffic of diverse types, CBR traffic and multimedia traffic, which are the most used today. For this, a NIRGAM Network simulator is used as a tool, which has the necessary configuration parameters to obtain the performance, latency, and power values to analyse the proposal. The results show that performance is a parameter that can be optimized by increasing the flit and/or operating frequency value, but without neglecting the power consumption that it would generate.",

keywords = "Field Programmable Gate Arrays (FPGA), Network on Chip (NOC), System on Chip (SoC)",

author = "Byron Ojeda and Mayerly Saenz and Ver{\'o}nica Alulema and Darwin Alulema",

note = "Publisher Copyright: {\textcopyright} 2023, The Author(s), under exclusive license to Springer Nature Switzerland AG.; 8th International Conference on Science, Technology and Innovation for Society, CITIS 2022 ; Conference date: 22-06-2022 Through 24-06-2022",

year = "2023",

doi = "10.1007/978-3-031-24327-1_7",

language = "English",

isbn = "9783031243264",

series = "Lecture Notes in Networks and Systems",

publisher = "Springer Science and Business Media Deutschland GmbH",

pages = "72--80",

editor = "Vladimir Robles-Bykbaev and Josefa Mula and Gilberto Reynoso-Meza",

booktitle = "Intelligent Technologies",

address = "Germany",

}

Ojeda, B, Saenz, M, Alulema, V & Alulema, D 2023, Analysis of a Network Interface for an On-Chip Network Architecture. in V Robles-Bykbaev, J Mula & G Reynoso-Meza (eds), Intelligent Technologies: Design and Applications for Society - Proceedings of CITIS 2022. Lecture Notes in Networks and Systems, vol. 607 LNNS, Springer Science and Business Media Deutschland GmbH, pp. 72-80, 8th International Conference on Science, Technology and Innovation for Society, CITIS 2022, Guayaquil, Ecuador, 22/06/22. https://doi.org/10.1007/978-3-031-24327-1_7

Analysis of a Network Interface for an On-Chip Network Architecture. / Ojeda, Byron; Saenz, Mayerly; Alulema, Verónica et al.
Intelligent Technologies: Design and Applications for Society - Proceedings of CITIS 2022. ed. / Vladimir Robles-Bykbaev; Josefa Mula; Gilberto Reynoso-Meza. Springer Science and Business Media Deutschland GmbH, 2023. p. 72-80 (Lecture Notes in Networks and Systems; Vol. 607 LNNS).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Analysis of a Network Interface for an On-Chip Network Architecture

AU - Ojeda, Byron

AU - Saenz, Mayerly

AU - Alulema, Verónica

AU - Alulema, Darwin

PY - 2023

Y1 - 2023

N2 - This document details a study on the Network Interface (Network on Chip), focused on performance parameters, by injecting traffic of diverse types, CBR traffic and multimedia traffic, which are the most used today. For this, a NIRGAM Network simulator is used as a tool, which has the necessary configuration parameters to obtain the performance, latency, and power values to analyse the proposal. The results show that performance is a parameter that can be optimized by increasing the flit and/or operating frequency value, but without neglecting the power consumption that it would generate.

AB - This document details a study on the Network Interface (Network on Chip), focused on performance parameters, by injecting traffic of diverse types, CBR traffic and multimedia traffic, which are the most used today. For this, a NIRGAM Network simulator is used as a tool, which has the necessary configuration parameters to obtain the performance, latency, and power values to analyse the proposal. The results show that performance is a parameter that can be optimized by increasing the flit and/or operating frequency value, but without neglecting the power consumption that it would generate.

KW - Field Programmable Gate Arrays (FPGA)

KW - Network on Chip (NOC)

KW - System on Chip (SoC)

UR - http://www.scopus.com/inward/record.url?scp=85151048400&partnerID=8YFLogxK

U2 - 10.1007/978-3-031-24327-1_7

DO - 10.1007/978-3-031-24327-1_7

M3 - Conference contribution

AN - SCOPUS:85151048400

SN - 9783031243264

T3 - Lecture Notes in Networks and Systems

SP - 72

EP - 80

BT - Intelligent Technologies

A2 - Robles-Bykbaev, Vladimir

A2 - Mula, Josefa

A2 - Reynoso-Meza, Gilberto

PB - Springer Science and Business Media Deutschland GmbH

T2 - 8th International Conference on Science, Technology and Innovation for Society, CITIS 2022

Y2 - 22 June 2022 through 24 June 2022

ER -

Ojeda B, Saenz M, Alulema V, Alulema D. Analysis of a Network Interface for an On-Chip Network Architecture. In Robles-Bykbaev V, Mula J, Reynoso-Meza G, editors, Intelligent Technologies: Design and Applications for Society - Proceedings of CITIS 2022. Springer Science and Business Media Deutschland GmbH. 2023. p. 72-80. (Lecture Notes in Networks and Systems). doi: 10.1007/978-3-031-24327-1_7

Analysis of a Network Interface for an On-Chip Network Architecture

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Bibliographical note

Keywords

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Cite this