Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system

Ruben A. Zapatan; Pablo M. Lucero; Eduardo E. Armijos; Jonathan Coronel; Diego R. Cabrera

doi:10.1109/Chilecon.2015.7404684

Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system

Ruben A. Zapatan, Pablo M. Lucero, Eduardo E. Armijos, Jonathan Coronel, Diego R. Cabrera

Producción científica: Contribución a una conferencia › Documento

Resumen

© 2015 IEEE. In this paper the implementation of a virtual sensor is presented, using an artificial neural network (ANN) in an FPGA system, which will serve to estimate the speed of a DC motor. The acquisition and processing of signals RNA training and detailed architecture implemented in the FPGA is shown. Finally the behavior of the virtual sensor is analyzed in normal and abnormal operating conditions.

Idioma original	Inglés estadounidense
Páginas	931-935
Número de páginas	5
DOI	https://doi.org/10.1109/Chilecon.2015.7404684
Estado	Publicada - 4 feb. 2016
Evento	2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, CHILECON 2015 - Santiago, Chile Duración: 28 oct. 2015 → 30 oct. 2015

Conferencia

Conferencia	2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, CHILECON 2015
Título abreviado	CHILECON 2015
País/Territorio	Chile
Ciudad	Santiago
Período	28/10/15 → 30/10/15

Acceder al documento

10.1109/Chilecon.2015.7404684

https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84964900961&origin=inward

Citar esto

Zapatan, R. A., Lucero, P. M., Armijos, E. E., Coronel, J., & Cabrera, D. R. (2016). Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system. 931-935. Papel presentado en 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, CHILECON 2015, Santiago, Chile. https://doi.org/10.1109/Chilecon.2015.7404684

@conference{4712065bba7e4081bebf0457e0b15e71,

title = "Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system",

abstract = "{\textcopyright} 2015 IEEE. In this paper the implementation of a virtual sensor is presented, using an artificial neural network (ANN) in an FPGA system, which will serve to estimate the speed of a DC motor. The acquisition and processing of signals RNA training and detailed architecture implemented in the FPGA is shown. Finally the behavior of the virtual sensor is analyzed in normal and abnormal operating conditions.",

author = "Zapatan, {Ruben A.} and Lucero, {Pablo M.} and Armijos, {Eduardo E.} and Jonathan Coronel and Cabrera, {Diego R.}",

year = "2016",

month = feb,

day = "4",

doi = "10.1109/Chilecon.2015.7404684",

language = "English (US)",

pages = "931--935",

note = "CHILECON 2015 - 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, Proceedings of IEEE Chilecon 2015, CHILECON 2015 ; Conference date: 28-10-2015 Through 30-10-2015",

}

Zapatan, RA, Lucero, PM, Armijos, EE, Coronel, J & Cabrera, DR 2016, 'Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system', Papel presentado en 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, CHILECON 2015, Santiago, Chile, 28/10/15 - 30/10/15 pp. 931-935. https://doi.org/10.1109/Chilecon.2015.7404684

Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system. / Zapatan, Ruben A.; Lucero, Pablo M.; Armijos, Eduardo E. et al.
2016. 931-935 Papel presentado en 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, CHILECON 2015, Santiago, Chile.

Producción científica: Contribución a una conferencia › Documento

TY - CONF

T1 - Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system

AU - Zapatan, Ruben A.

AU - Lucero, Pablo M.

AU - Armijos, Eduardo E.

AU - Coronel, Jonathan

AU - Cabrera, Diego R.

PY - 2016/2/4

Y1 - 2016/2/4

N2 - © 2015 IEEE. In this paper the implementation of a virtual sensor is presented, using an artificial neural network (ANN) in an FPGA system, which will serve to estimate the speed of a DC motor. The acquisition and processing of signals RNA training and detailed architecture implemented in the FPGA is shown. Finally the behavior of the virtual sensor is analyzed in normal and abnormal operating conditions.

AB - © 2015 IEEE. In this paper the implementation of a virtual sensor is presented, using an artificial neural network (ANN) in an FPGA system, which will serve to estimate the speed of a DC motor. The acquisition and processing of signals RNA training and detailed architecture implemented in the FPGA is shown. Finally the behavior of the virtual sensor is analyzed in normal and abnormal operating conditions.

U2 - 10.1109/Chilecon.2015.7404684

DO - 10.1109/Chilecon.2015.7404684

M3 - Paper

SP - 931

EP - 935

T2 - CHILECON 2015 - 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, Proceedings of IEEE Chilecon 2015

Y2 - 28 October 2015 through 30 October 2015

ER -

Zapatan RA, Lucero PM, Armijos EE, Coronel J, Cabrera DR. Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system. 2016. Papel presentado en 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, CHILECON 2015, Santiago, Chile. doi: 10.1109/Chilecon.2015.7404684

Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system

Resumen

Conferencia

Acceder al documento

Huella

Citar esto