Implementation and Comparison of a Fast Shape Recognition Algorithm using Different FPGA Platforms

Andre Borja; Guillaume Varengues; Luis Miguel Procel; Lionel Trojman; German Arevalo; Daniel Cardenas

doi:10.1109/ETCM48019.2019.9014902

Implementation and Comparison of a Fast Shape Recognition Algorithm using Different FPGA Platforms

Andre Borja
, Guillaume Varengues
, Luis Miguel Procel
, Lionel Trojman
, German Arevalo
, Daniel Cardenas

Research Group in Electronics and Telematics (GIETEC)

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

In the present work, we implement and compare a fast shape recognition algorithm in two FPGA platforms: ZYBO and VIRTEX-5. We successfully implement our algorithm for several image resolutions in both hardware. We have found that VIRTEX-5 provides 14-19% faster processing than ZYBO, making it ideal for real time execution and higher resolution algorithms for computer vision, however, this comes at a cost of 8-10% more power consumption with respect to ZYBO platform. These results show that both platforms are good candidates for implementing this kind of algorithms depending on the focus of the hardware: performance or power saving.

Original language	English
Title of host publication	2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728137643
DOIs	https://doi.org/10.1109/ETCM48019.2019.9014902
State	Published - Nov 2019
Event	4th IEEE Ecuador Technical Chapters Meeting, ETCM 2019 - Guayaquil, Ecuador Duration: 13 Nov 2019 → 15 Nov 2019

Publication series

Name	2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019

Conference

Conference	4th IEEE Ecuador Technical Chapters Meeting, ETCM 2019
Country/Territory	Ecuador
City	Guayaquil
Period	13/11/19 → 15/11/19

Bibliographical note

Publisher Copyright:
© 2019 IEEE.

Keywords

computer vison
FPGA
HDL
shape recognition

Access to Document

10.1109/ETCM48019.2019.9014902

Cite this

Borja, A., Varengues, G., Procel, L. M., Trojman, L., Arevalo, G., & Cardenas, D. (2019). Implementation and Comparison of a Fast Shape Recognition Algorithm using Different FPGA Platforms. In 2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019 Article 9014902 (2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ETCM48019.2019.9014902

@inproceedings{774320bdcc3b4bdaba9f0ba9099261c6,

title = "Implementation and Comparison of a Fast Shape Recognition Algorithm using Different FPGA Platforms",

abstract = "In the present work, we implement and compare a fast shape recognition algorithm in two FPGA platforms: ZYBO and VIRTEX-5. We successfully implement our algorithm for several image resolutions in both hardware. We have found that VIRTEX-5 provides 14-19\% faster processing than ZYBO, making it ideal for real time execution and higher resolution algorithms for computer vision, however, this comes at a cost of 8-10\% more power consumption with respect to ZYBO platform. These results show that both platforms are good candidates for implementing this kind of algorithms depending on the focus of the hardware: performance or power saving.",

keywords = "computer vison, FPGA, HDL, shape recognition",

author = "Andre Borja and Guillaume Varengues and Procel, \{Luis Miguel\} and Lionel Trojman and German Arevalo and Daniel Cardenas",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 4th IEEE Ecuador Technical Chapters Meeting, ETCM 2019 ; Conference date: 13-11-2019 Through 15-11-2019",

year = "2019",

month = nov,

doi = "10.1109/ETCM48019.2019.9014902",

language = "English",

series = "2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Borja, A, Varengues, G, Procel, LM, Trojman, L, Arevalo, G & Cardenas, D 2019, Implementation and Comparison of a Fast Shape Recognition Algorithm using Different FPGA Platforms. in 2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019., 9014902, 2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019, Institute of Electrical and Electronics Engineers Inc., 4th IEEE Ecuador Technical Chapters Meeting, ETCM 2019, Guayaquil, Ecuador, 13/11/19. https://doi.org/10.1109/ETCM48019.2019.9014902

Implementation and Comparison of a Fast Shape Recognition Algorithm using Different FPGA Platforms. / Borja, Andre; Varengues, Guillaume; Procel, Luis Miguel et al.
2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019. Institute of Electrical and Electronics Engineers Inc., 2019. 9014902 (2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Varengues, Guillaume

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AU - Trojman, Lionel

AU - Arevalo, German

AU - Cardenas, Daniel

PY - 2019/11

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N2 - In the present work, we implement and compare a fast shape recognition algorithm in two FPGA platforms: ZYBO and VIRTEX-5. We successfully implement our algorithm for several image resolutions in both hardware. We have found that VIRTEX-5 provides 14-19% faster processing than ZYBO, making it ideal for real time execution and higher resolution algorithms for computer vision, however, this comes at a cost of 8-10% more power consumption with respect to ZYBO platform. These results show that both platforms are good candidates for implementing this kind of algorithms depending on the focus of the hardware: performance or power saving.

AB - In the present work, we implement and compare a fast shape recognition algorithm in two FPGA platforms: ZYBO and VIRTEX-5. We successfully implement our algorithm for several image resolutions in both hardware. We have found that VIRTEX-5 provides 14-19% faster processing than ZYBO, making it ideal for real time execution and higher resolution algorithms for computer vision, however, this comes at a cost of 8-10% more power consumption with respect to ZYBO platform. These results show that both platforms are good candidates for implementing this kind of algorithms depending on the focus of the hardware: performance or power saving.

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KW - FPGA

KW - HDL

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DO - 10.1109/ETCM48019.2019.9014902

M3 - Conference contribution

AN - SCOPUS:85081998212

T3 - 2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019

BT - 2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 4th IEEE Ecuador Technical Chapters Meeting, ETCM 2019

Y2 - 13 November 2019 through 15 November 2019

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Borja A, Varengues G, Procel LM, Trojman L, Arevalo G, Cardenas D. Implementation and Comparison of a Fast Shape Recognition Algorithm using Different FPGA Platforms. In 2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019. Institute of Electrical and Electronics Engineers Inc. 2019. 9014902. (2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019). doi: 10.1109/ETCM48019.2019.9014902

Implementation and Comparison of a Fast Shape Recognition Algorithm using Different FPGA Platforms

Abstract

Publication series

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Bibliographical note

Keywords

Access to Document

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