Design of Current Control Loop for Grid Connected Inverters Operating Under Nonideal Grid Conditions

Julio Viola, José Restrepo, José Manuel Aller, Flavio Quizhpi, Marco Fajardo

Research output: Contribution to conferencePaper

2 Scopus citations

Abstract

© 2016 IEEE. A case study for designing the current control loop for single-phase inverters connected to weak grids is presented. The problems associated to the design of current control loop when highly distorted grid voltages are present and LCL filters are used to couple the inverters to the grid, are analyzed. Fourier coefficients decomposition is used to obtain an ahead-of-time version for the nonideal voltage signal which allows to compensate the current control loop delay. Also the relevance of a nonideal characteristic of the inverter as the dead-time effect on the shape of the controlled current is analyzed and compensated.
Original languageEnglish
Pages29-34
Number of pages6
DOIs
StatePublished - 28 Apr 2016
EventIEEE Green Technologies Conference - Denver, United States
Duration: 29 Mar 201731 Mar 2017

Conference

ConferenceIEEE Green Technologies Conference
Country/TerritoryUnited States
CityDenver
Period29/03/1731/03/17

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