Two methods for the estimation of the DC voltages in the capacitors associated to the DC buses in a cascaded multilevel converter topology are analyzed. To reduce the number of voltage sensors, available information from inductor currents and line voltage sensors is used as input to a discrete time model of the converter. Additionally, information from the switching state of each converter's cell is used allowing an estimation of voltages in each capacitor. Both methods are developed, implemented and simulated for a 9 level three-phase cascaded multilevel converter when it is operated as a controlled rectifier at unity power factor. The analyzed methods have low computational cost allowing its implementation in real time. © 2014 IEEE.
|State||Published - 1 Jan 2014|
|Event||2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings - |
Duration: 1 Jan 2014 → …
|Conference||2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings|
|Period||1/01/14 → …|