Balance of a hexapod in real time using a FPGA

Luis M. Aguilar, Juan P. Torres, Christian R. Jimenes, Diego R. Cabrera

Research output: Contribution to conferencePaper

2 Scopus citations
Translated title of the contributionBalance de un hexápodo en tiempo real usando un FPGA.
Original languageEnglish
Pages825-828
Number of pages4
DOIs
StatePublished - 4 Feb 2016
EventCHILECON 2015 - 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, Proceedings of IEEE Chilecon 2015 - Santiago, Chile
Duration: 28 Oct 201530 Oct 2015

Conference

ConferenceCHILECON 2015 - 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, Proceedings of IEEE Chilecon 2015
Abbreviated titleCHILECON 2015
CountryChile
CitySantiago
Period28/10/1530/10/15

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