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Digital Signal Processing in Reconfigurable Digital Micro and Nanoelectronics Circuits for Communications and Control

Project Details

Description

This project addresses the implementation of complex Digital Signal Processing (DSP) algorithms, traditionally executed on microprocessors, onto reconfigurable hardware platforms such as FPGAs. The main goal is to leverage the high-speed and parallel processing capabilities of FPGAs for telecommunications and automatic control applications demanding high complexity and fast response, such as real-time image processing. Two key challenges in this migration are identified: the fundamental difference in programming logic (hardware description versus software) and the necessity to adapt algorithms for the fixed-point arithmetic inherent to reconfigurable hardware. The methodology involves an exhaustive state-of-the-art review using databases like IEEE Xplorer, followed by rigorous simulation of the algorithms considering hardware constraints. Finally, successful implementations will be deployed and verified on FPGA boards and integrated circuit software, culminating in a publication of the results.<br/><br/><b>Goal</b>: <br/>Implement telecommunications Digital Signal Processing (DSP) and control algorithms using reconfigurable digital electronics, overcoming the migration challenges from microprocessors to FPGAs.<br/><br/><b>Research lines</b>: <br/>Telecommunications and information technologies
StatusFinished
Effective start/end date23/03/1923/03/20

Keywords

  • Digital Signal Processing
  • DSP
  • FPGA
  • Reconfigurable Digital Electronics
  • Telecommunications
  • Automatic Control
  • Fixed-Point Arithmetic
  • Image Processing
  • Hardware Description Language
  • HDL

CACES Knowledge Areas

  • 8417A Telecommunications