General objective Implement telecom and control DSP algorithms in reconfigurable digital electronics Justification Solutions to the problems described consist of: simplifying the DSP algorithms for a better implementation in hardware, and thus achieving better processing speed; and, implement several channels of low frequency operation in the same hardware and/or replace analog elements of a circuit with a digital algorithm. This research project will evaluate these algorithms and implement them in configurable hardware. Its implementation in an integrated circuit prototype as HDL code will also be proposed.
|Effective start/end date||23/03/19 → 23/03/19|
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